Semiconductor Industry Explained: Fabless vs Foundry, Value Chain, and How to Analyze Chip Stocks

Semiconductors are the foundation of modern technology. Every smartphone, data center server, electric vehicle, and industrial robot depends on chips. For investors, the semiconductor industry offers compelling long-term growth but comes with a complexity that trips up many retail investors. The industry is not monolithic. It spans dozens of distinct subsectors, each with different business models, margin profiles, and risk factors.

This guide breaks down the full semiconductor value chain, explains the three dominant business models, identifies the key players at each layer, and gives you a practical framework for evaluating chip stocks.

The Three Core Business Models

The most important structural distinction in semiconductors is how a company chooses to handle manufacturing. There are three models: fabless, integrated device manufacturer (IDM), and pure-play foundry.

Fabless Companies

A fabless semiconductor company designs chips but owns no manufacturing facilities. The term comes from "fabrication-less." Companies like Nvidia, Qualcomm, AMD, Broadcom, and MediaTek are fabless. They employ engineers who design chips using electronic design automation (EDA) software, then hand off the finished design files to a foundry that manufactures the chips on their behalf.

The business model is asset-light. Fabless companies avoid the enormous capital expenditure required to build and maintain a chip fabrication plant (called a "fab"). A modern leading-edge fab costs $10 billion to $20 billion or more to construct. By outsourcing manufacturing, fabless companies allocate capital to R&D and sales instead.

The tradeoff is dependency. A fabless company has no direct control over manufacturing capacity, yield, or lead times. When TSMC has capacity constraints, fabless customers feel it immediately.

Gross margins for fabless companies are typically high, often ranging from 50% to 65% or above for chip designers focused on high-performance markets like data center GPUs or wireless modems.

Integrated Device Manufacturers (IDMs)

An IDM designs and manufactures its own chips. Intel is the classic example, along with Texas Instruments, STMicroelectronics, and ON Semiconductor. IDMs own fabs and run them to produce chips for their own product lines.

The strategic advantage is vertical integration. An IDM can optimize chip design for its specific manufacturing process, tighten design-to-production feedback loops, and retain manufacturing flexibility. Intel's competitive edge for decades came from the combination of leading chip design and leading process technology.

The disadvantage is capital intensity. IDMs must continuously invest in fab upgrades to stay competitive. Missing a technology node transition, as Intel experienced between roughly 2016 and 2022, can cause a multi-year competitive disadvantage that erodes market share quickly.

IDM gross margins vary widely by end market. Analog chip IDMs like Texas Instruments often run gross margins in the 60-65% range. Logic IDMs like Intel run lower, typically 40-55%, because their manufacturing costs are higher relative to pricing.

Pure-Play Foundries

A pure-play foundry manufactures chips for other companies. It has no proprietary chip products. TSMC (Taiwan Semiconductor Manufacturing Company) is the dominant example globally, with Samsung Foundry as the second major player and GlobalFoundries serving the mature-node market.

Foundries generate revenue from wafer starts and wafer pricing. A foundry is essentially a contract manufacturer, but the technology required is among the most sophisticated in human history. TSMC's 3-nanometer process requires equipment that only ASML can supply, processes that took decades to develop, and yields that took years to optimize.

Pure-play foundry margins are lower than fabless chip designers. TSMC runs gross margins in the 50-55% range in good cycles, lower in downturns. The model is capital-intensive. TSMC regularly invests $30 billion or more per year in capital expenditure.

The Value Chain: From Concept to Chip

Understanding the semiconductor value chain helps identify which companies profit from each stage.

EDA Software: The Starting Point

Before any chip is manufactured, it must be designed. Electronic design automation software is how engineers draw and verify chip layouts. The two dominant EDA vendors are Cadence Design Systems and Synopsys. A third significant player is Siemens EDA (formerly Mentor Graphics).

EDA software is a gating input. No chip gets designed without it. Cadence and Synopsys both generate recurring revenue through annual software subscriptions from nearly every fabless company and IDM on earth. Their gross margins exceed 75-80%, their revenue is sticky, and their combined market position is a near-duopoly.

For investors, EDA companies are often described as "picks and shovels" plays on semiconductor growth. They benefit from rising chip complexity and growing R&D budgets whether or not any single chipmaker wins or loses competitively.

IP Licensing: ARM Holdings

Most chips today use processor cores licensed from ARM Holdings. ARM does not manufacture chips and does not design finished chips. It designs the instruction set architecture and processor core blueprints, then licenses that intellectual property to chip designers who integrate ARM cores into their own custom chips.

Apple's A-series chips, Qualcomm's Snapdragon processors, and virtually every smartphone chip in the world use ARM-licensed IP. ARM charges an upfront license fee and a per-chip royalty. Its gross margins are exceptionally high because the product is intellectual property, not physical goods.

ARM went public on Nasdaq in 2023 and trades at a premium to most semiconductor companies, reflecting its royalty-stream business model and its central position in the chip design ecosystem.

Manufacturing Equipment

Before TSMC can manufacture a chip, it needs equipment. The semiconductor equipment layer is dominated by a small number of highly specialized companies.

ASML holds a monopoly on extreme ultraviolet (EUV) lithography machines, which are required to produce chips at 7nm and below. Each EUV machine costs roughly $150-200 million and takes years to manufacture. No alternative supplier exists. This monopoly position gives ASML extraordinary pricing power and makes it a critical chokepoint in global chip supply.

Applied Materials and Lam Research supply deposition, etching, and surface preparation equipment. KLA Corporation specializes in process control and inspection, measuring defects at the nanometer scale during manufacturing. Tokyo Electron (TEL) is the dominant Japanese equipment maker across multiple process steps.

Equipment companies benefit from capacity expansion cycles. When foundries and IDMs spend heavily on new fabs, equipment revenue spikes. When spending slows, equipment orders fall sharply. This makes equipment companies more cyclical than EDA or IP licensing companies.

Logic vs. Memory: Two Different Markets

Within chip manufacturing, logic and memory are fundamentally different markets with different economics.

Logic chips perform computation. CPUs, GPUs, FPGAs, and application processors are logic chips. They are typically designed by differentiated companies with proprietary architectures and command high margins. Logic manufacturing is dominated by TSMC and Samsung at leading nodes.

Memory chips store data. DRAM (dynamic random access memory) and NAND flash are memory chips. Memory is largely a commodity. DRAM is dominated by Samsung, SK Hynix, and Micron. NAND is dominated by Samsung, Kioxia, Western Digital, SK Hynix, and Micron.

Because memory is a commodity, pricing is set by supply and demand cycles. Oversupply crashes DRAM prices rapidly. Undersupply spikes them. Memory companies swing from high profitability to operating losses within a single cycle. This makes memory stocks among the most volatile in the semiconductor space.

Cyclicality and Inventory Cycles

Semiconductors are cyclical. Understanding the cycle is essential for timing analysis and avoiding value traps.

The chip cycle has several phases. In the upturn, demand exceeds supply, lead times extend to 12-52 weeks, customers double-order to secure supply, and chip prices rise. Manufacturers accelerate capacity additions. In the peak, inventory builds across the supply chain as customers receive chips they over-ordered. Revenue is high but the excess is not yet visible.

In the downturn, customers reduce orders dramatically to burn through inventory. Fab utilization falls. Revenue declines sharply. Companies cut capex. In the trough, inventory has been digested, pricing stabilizes, and early signs of the next upturn emerge.

The 2020-2023 chip cycle illustrated this pattern vividly. COVID-driven demand and supply disruptions created the most severe shortage in decades. Companies across every industry over-ordered chips, driving massive inventory builds. By late 2022, the correction was severe. Consumer chip inventories were bloated, PC and smartphone demand collapsed, and companies like Micron and Marvell saw revenue drop 30-50%.

The key variable is inventory levels across the value chain, not end demand alone. A strong economy with high chip inventory can still produce a revenue downturn for chipmakers.

Geopolitical Risk: TSMC, China, and Export Controls

No industry analysis of semiconductors is complete without geopolitical context.

TSMC manufactures the overwhelming majority of the world's leading-edge chips in Taiwan. The geographic concentration creates systemic risk. Any disruption to Taiwan, whether from geopolitical tension, natural disaster, or supply chain shock, would have global economic consequences. The United States, European Union, Japan, and South Korea have all launched domestic chip manufacturing incentive programs (the CHIPS Act in the US, for example) to reduce this concentration risk. TSMC is building fabs in Arizona, Japan, and Germany in response to these incentives.

China is both a massive end market for semiconductors and a subject of export controls. The US government has imposed restrictions on exporting advanced chip manufacturing equipment, EDA software, and advanced chips to China. ASML cannot sell EUV machines to China. Nvidia's data center GPUs are restricted. These controls limit addressable markets for US and allied chip companies while incentivizing China to build domestic alternatives, which China has invested hundreds of billions in pursuing.

Investors in companies with heavy China revenue exposure (many fabless companies generate 25-60% of revenue from Chinese customers) need to monitor export control policy as an ongoing risk factor.

How to Evaluate Semiconductor Companies

Gross Margin as a Quality Signal

Gross margin separates differentiated semiconductor businesses from commodity suppliers. A fabless chip company with 60%+ gross margin has pricing power because its chips are difficult to substitute. A memory company running 30% gross margin in a down cycle is a commodity price-taker.

Compare gross margin against industry peers in the same subsector rather than against the semiconductor industry as a whole. Comparing Nvidia's gross margin to a DRAM manufacturer's is not meaningful.

Fab Utilization Rate

For IDMs and foundries, utilization rate measures the percentage of manufacturing capacity being used. Higher utilization spreads fixed costs across more units, improving margins. Utilization typically runs 70-90% in healthy cycles. When it falls below 70%, fixed cost absorption worsens and margins compress rapidly.

Utilization rate is a leading indicator of profitability direction. A company reporting rising utilization is likely heading toward margin expansion. Falling utilization signals margin compression ahead.

Book-to-Bill Ratio

The book-to-bill ratio divides new orders received by revenue billed in the same period. A ratio above 1.0 means orders are growing faster than shipments: demand is accelerating. A ratio below 1.0 means shipments are exceeding new orders: demand is weakening.

The Semiconductor Industry Association (SIA) publishes monthly book-to-bill data for North American chip equipment companies. Individual companies report it in earnings commentary or can be inferred from backlog disclosures. Book-to-bill above 1.1 is generally positive; below 0.9 is a warning signal.

Revenue Mix and End Markets

Semiconductors serve many end markets: data center, PC, smartphone, automotive, industrial, and communications infrastructure. Each market has different growth rates and different cyclicality.

Data center (driven by AI and cloud) has been the fastest-growing end market from roughly 2022-2026. Automotive chips have grown as vehicles incorporate more electronic content. PC and smartphone are more mature and more cyclical.

A company with 60% data center exposure and 10% PC exposure has a very different growth profile than one with the reverse. Always examine revenue by end market in earnings presentations.

Comparison Table: Semiconductor Business Models

Reading a Semiconductor Earnings Release

Semiconductor companies communicate several metrics that go beyond standard financial reporting. Watch for these in earnings calls and presentations.

Backlog and lead times: Longer lead times mean demand exceeds near-term supply, which is a positive signal. Shortening lead times can signal demand weakening or capacity catching up.

Design wins: A design win means a customer has selected a company's chip for inclusion in a future product. Design wins generate revenue 12-24 months later. A strong design win pipeline is a leading indicator of future revenue.

Inventory days outstanding: Rising inventory days can signal slower-than-expected demand. Watch for inventory buildup on the balance sheet before revenue misses appear in the income statement.

Capital expenditure guidance: For equipment-dependent companies, capex guidance signals capacity investment intent. Foundries cutting capex are pricing in weaker demand.

Key Takeaways

The semiconductor industry operates across a layered value chain from EDA software through chip design, manufacturing equipment, and wafer fabrication. Each layer has different economics, margin profiles, and risk factors.

The three primary business models - fabless, IDM, and pure-play foundry - reflect distinct choices about capital intensity and vertical integration. Fabless companies earn higher returns on capital but depend on foundries for manufacturing. IDMs retain manufacturing control but carry heavy fixed costs. Foundries serve as the manufacturing backbone of the industry.

Gross margin, fab utilization, and book-to-bill ratio are the three most practical metrics for evaluating semiconductor companies at different stages of the cycle. EDA vendors and IP licensors like ARM are the least cyclical parts of the value chain. Memory chipmakers are the most cyclical.

Geopolitical risk, particularly around Taiwan and US-China export controls, is a permanent feature of semiconductor investing and requires ongoing monitoring as policy evolves.

When analyzing any chip company, identify its subsector, its end market exposure, and where it sits in the current inventory cycle before forming a view on valuation.